Description

On the Trusted Firmware-M (TF-M) 2 through 2.3.0 platform before 00d1b3e, mailbox initialization on PSOC64 and RP2350 accepts a non-secure, unvalidated, supplied pointer.

Executive Summary

Technical Details

Mitigations

References

Additional Metadata

{
  "score": "7.0",
  "pubDate": "2026-08-26T05:18:11.053Z",
  "pubdate": "2026-08-26T05:18:11.053Z",
  "executiveSummary": "Trusted Firmware-M (TF-M) versions 2.0 through 2.3.0 contain a critical vulnerability in the mailbox initialization sequence for PSOC64 and RP2350 platforms. The vulnerability is classified as an improper input validation flaw, specifically concerning the handling of untrusted pointers provided by the non-secure domain.\nBy supplying a non-secure, unvalidated pointer during mailbox initialization, an attacker can influence the internal state of the secure mailbox mechanism. This architectural flaw allows a non-secure actor to potentially bypass memory isolation boundaries or induce undefined behavior within the Secure Processing Environment (SPE).\nThe risk implication is significant, as successful exploitation may result in arbitrary memory access or integrity compromise of secure services. The vulnerability requires the attacker to have execution capabilities within the non-secure domain. Given that TF-M serves as the security foundation for these platforms, exploiting this initialization flaw compromises the root of trust, potentially facilitating privilege escalation or the exfiltration of sensitive cryptographic material managed by the Secure Processing Environment.",
  "technicalDetails": "The vulnerability resides within the mailbox initialization logic of Trusted Firmware-M (TF-M) for specific target architectures, namely PSOC64 and RP2350. The root cause is a failure to perform adequate input sanitization on a pointer passed from the non-secure (NS) world to the secure (S) domain during the mailbox setup routine. In embedded systems utilizing ARM TrustZone-M or equivalent isolation architectures, the secure mailbox acts as a communication bridge between the non-secure and secure environments. The security of this bridge relies entirely on the premise that any configuration parameters provided by the non-secure software are strictly validated before being dereferenced or stored in secure memory.\nIn the affected versions (2.0 through 2.3.0, prior to commit 00d1b3e), the initialization sequence fails to verify that the pointer provided by the non-secure caller resides within the allowed memory bounds. When the secure mailbox initializes, it attempts to map or utilize this user-supplied pointer to establish communication buffers. Because the pointer remains unvalidated, the secure domain performs operations based on a memory address that can be controlled by a malicious non-secure actor.\nThe attack flow proceeds as follows: First, an attacker executes code within the non-secure software environment. Second, the attacker invokes the mailbox initialization interface, intentionally providing a malicious pointer value—either targeting sensitive secure memory addresses or invalid peripheral memory regions. Third, the TF-M secure mailbox driver receives this pointer and proceeds to perform initialization operations, such as buffer setup or structure instantiation, at the address controlled by the attacker. This enables an 'out-of-bounds' write or read primitive from the perspective of the secure monitor.\nThe post-exploitation impact allows for the corruption of secure memory structures, which may lead to the redirection of secure control flow or the alteration of security policy configurations. By manipulating these structures, an attacker can downgrade the security posture of the device, bypass secondary authentication checks, or potentially overwrite critical code segments within the secure environment. The lack of prior authentication or privilege requirements beyond non-secure execution makes this a high-impact vulnerability for platforms relying on TF-M for multi-domain isolation, specifically those using the PSOC64 and RP2350 silicon, where hardware-backed secure storage is highly sensitive to memory corruption exploits."
}