Sceawere
Vulnerability Detail
CVE-2023-20576UPDATED Verified Sceawere Triage Sources: NVD / CISA KEV
AGESA SPI ROM Authentication Bypass
Vulnerability Metadata
- Severity
- High
- Score / CVSS
- 7.7
- Creation Date
- 13h ago
- Vendor
- AMD
- Product
- AMD Ryzen™ 3000 Series Desktop Processors
- Attack Type
- CWE-345 Insufficient Verification of Data Authenticity
- Vector String
- CVSS:3.1/AV:L/AC:L/PR:N/UI:N/S:U/C:H/I:N/A:H
- Attack Complexity
- LOW
Narrative and Response
Description
Insufficient Verification of Data Authenticity in AGESA™ may allow an attacker to update SPI ROM data potentially resulting in denial of service or privilege escalation.
Executive Summary
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Technical Details
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Mitigations
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References
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Duis aute irure dolor in reprehenderit in voluptate velit esse cillum dolore eu fugiat nulla pariatur. Excepteur sint occaecat cupidatat non proident, sunt in culpa qui officia deserunt mollit anim id est laborum.
Additional Metadata
{
"score": "7.7",
"pubDate": "2026-09-02T20:17:32.950Z",
"pubdate": "2026-09-02T20:17:32.950Z",
"executiveSummary": "This vulnerability involves an insufficient verification mechanism within the AMD Generic Encapsulated Software Architecture (AGESA) firmware interface, specifically concerning the integrity of data written to the Serial Peripheral Interface (SPI) ROM.\nThe flaw allows an attacker to bypass standard validation protocols when updating the SPI ROM, which stores critical system firmware, including the BIOS/UEFI images.\nImpacts of successful exploitation include potential Denial of Service (DoS) through bricking the motherboard or Privilege Escalation by injecting malicious code into the pre-boot execution environment.\nThe vulnerability affects systems utilizing specific versions of AGESA firmware that lack cryptographic enforcement during the SPI flash update process.\nSuccessful exploitation requires the attacker to have sufficient local or platform-level access to initiate a write operation to the SPI flash storage.\nThe risk implication is severe, as compromising the SPI flash grants an attacker persistence that survives operating system reinstallation, effectively bypassing traditional security boundaries like Secure Boot if signature verification is circumvented or absent.",
"technicalDetails": "The root cause of this vulnerability lies in the insufficient cryptographic authentication of data payloads during the SPI ROM update cycle within the AGESA firmware stack. In a hardened environment, the SPI flash controller or the platform firmware interface should mandate a strict digital signature verification process for any firmware image or configuration data being written to the non-volatile storage.\nThe vulnerability occurs because the AGESA firmware fails to adequately verify the authenticity and integrity of the data stream prior to commit. This effectively means that the firmware update interface lacks an immutable 'Root of Trust' verification step during the write sequence. An attacker with the ability to execute unauthorized SPI flash write commands can bypass the intended security policy.\nThe exploitation flow initiates when the attacker leverages an interface—such as a local system utility, a malicious driver, or a compromised platform management controller—to communicate with the SPI flash. Because the AGESA component does not perform an exhaustive verification of the authenticity of the incoming update binary, the flash controller commits the malformed or malicious data to the SPI chip.\nOnce the malicious data is written to the SPI ROM, it is loaded during the next platform reset/power cycle. Since the SPI ROM contains the foundational code that executes before the operating system, the injected malicious payload operates with the highest level of privilege. This allows the attacker to hook critical BIOS/UEFI functions, tamper with hardware configuration registers, or disable security features like Intel Boot Guard or AMD Hardware Verified Boot.\nPost-exploitation, the impact is comprehensive. By achieving persistence at the firmware level, the attacker gains a 'sub-OS' advantage, remaining invisible to traditional antivirus and endpoint detection and response (EDR) agents. Denial of Service is also trivial to achieve by writing null or corrupted data to critical sections of the SPI flash, rendering the hardware non-bootable.\nExploitation requirements include the capability to communicate with the SPI bus, typically requiring administrative or kernel-level privileges on the host system to interact with the flash memory interface. The exposure is largely local, though remote exploitation could occur if an attacker chains this with a secondary kernel-level vulnerability that allows for arbitrary physical memory or I/O port manipulation."
}